Regviz

Alif Semiconductor /AE302F80C1557LE_CM55_HE_View /ETH /ETH_MAC_TIMESTAMP_EGRESS_LATENCY

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MAC_TIMESTAMP_EGRESS_LATENCY

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Alif Semiconductor/AE302F80C1557LE_CM55_HE_View/ETH/ETH_MAC_TIMESTAMP_EGRESS_LATENCY#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ETLSNS0ETLNS

Description

Egress MAC latency Register

Fields

ETLSNS

Egress Timestamp Latency, in sub-nanoseconds This register holds the average latency in sub-nanoseconds between the actual point (RMII) where the egress timestamp is taken and the output ports (ETH_TXD[1-0]) of the MAC.
ETLNS

Egress Timestamp Latency, in nanoseconds This register holds the average latency in nanoseconds between the actual point (RMII) where the egress timestamp is taken and the output ports (ETH_TXD[1-0]) of the MAC.

Links

()

Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data